# Octal and binary number constants 514

As far as I know you can only chars i. You should convert all the binary constants to either hex or decimal. Hex would be easier because each nibble in a binary word corresponds to a digit in hex. An easier change may a simple BinToHex convertor routine. Here's a simple, naive version, which could be improved on in various ways:.

Pass in a string of '1' and ''0' characters, and it hands you back the unsigned 32 bit number. It can of course be optimised, but it demonstrates the concept. This site uses cookies to store information on your computer.

By continuing to use our site, you consent to our cookies. In one or more embodiments of the invention, the system includes the SFHU and the input decoding unit The input decoding unit may include one or more logic units i. The SFHU may include one or more logic units i. As also shown in FIG. In one or more embodiments of the invention, the system includes the DPD output formulation hardware unit The DPD output formulation hardware unit may include one or more logic units i.

In other words, in such embodiments, the SFHU , the input decoding unit , and the DPD output formulation hardware unit are omitted. The process shown in FIG. One or more steps shown in FIG. Accordingly, embodiments of the invention should not be considered limited to the specific number and arrangement of steps shown in FIG. As discussed above, the BID encoding includes a sign field, a combination field, a partial exponent field, and a partial significand field.

The BID encoding may be of any size including 32 bits, 64 bits, bits, bits, etc. In STEP , a binary input vector is generated. Specifically, the binary input vector is generated by concatenating the one or more hidden bits with the bits in the partial significand field of the BID encoding.

In BCD encoding e. In contrast, in DPD encoding, a set of three decimal digits are encoded using a bit declet. Initially, a binary input vector is obtained STEP The binary input vector may be obtained from any source and may be of any size. The BCD output vector may be sent to any sink. As discussed above, the BID encoding may be of any size, including 32 bits i. Those skilled in the art, having the benefit of this detailed description, will appreciate that if the BID encoding is BID64, the binary input vector will be 54 bits.

If the value of the three bits is greater than or equal to five, add binary three to the number and shift the result one bit to the left. If the value of the three bits is less than five, shift one bit to the left without adding three. Take the next bit from the right and repeat the operation until reaching the least significant bit, which will be carried over without decoding.

The E4 decoding block is effectively a look-up table with the relationship between the four input bits and the four output bits provided by truth-table Although the E4 decoding tree in FIG. The number of E4 decoding blocks increases rapidly with the number of binary bits to be converted to BCD. In one or more embodiments of the invention, an E6 decoding block e. As the three least significant output bits have only 5 out of 8 combinations i.

This concatenated value is the input to the E6 Decoding Tree and multiple stages of E4 decoding blocks Still referring to FIG. The second last stage of E4 decoding blocks outputs a four multiple of the BCD value i. The third last stage of E4 decoding blocks outputs a 2 multiple of the BCD value i.

The fourth last stage of E4 decoding blocks outputs the BCD value itself i. The binary input vector and the BCD output vector correspond to the binary input vector and BCD output vector , respectively, discussed above in reference to FIG.

In one or more embodiments of the invention, the BIN2BCD master module partitions the binary input vector into multiple non-overlapping segments: In one or more embodiment of the invention, the binary input vector is 54 bits in size, the initial segment is 11 bits in size, the intermediate segment is 20 bits in size, and the final segment is 23 bits in size. In one or more embodiments of the invention, each of the BIN2BCD units , , comprise an E6 decoding tree operatively connected to one or more stages of E4 decoding blocks to generate the BCD vector and its multiples , , Both the final BCD multiplier and the intermediate BCD multiplier have multiplexers and shifting circuits not shown.

In one or more embodiments of the invention, the intermediate BCD multiplier generates partial products corresponding to the multiplication of the intermediate internal BCD vector by a constant. The constant is based on a least significant bit of the intermediate segment Accordingly, in the example, the intermediate BCD multiplier generates partial products corresponding to: In one or more embodiments of the invention, the intermediate BCD multiplier generates the partial products using the input intermediate internal BCD vector and its multiples For example, assume the constant is The multiplication may be expressed as three partial products: Any multiplication by 10, , , 10 , etc.

In one or more embodiments of the invention, the final BCD multiplier generates partial products corresponding to the multiplication of the final internal BCD vector by a constant. The constant is based on a least significant bit of the final segment Accordingly, in the example, the final BCD multiplier generates partial products corresponding to: Cases "il" , "i" , "if" , true. This means it is either an octal.

Eat the prefix, determining the. If we discover that we have a. If there is an overflow, set Val to the low bits. Compute a conservative bound on the maximum number of. If we can't possibly overflow a. This avoids the expensive overflow checking below, and. If adding in digits. Don't bother with this if! This extensively assumes that 'char' is 8-bits.